| [* black] We can't help but think that the transistor layout looks a lot like a Roman [http://upload.wikimedia.org/wikipedia/commons/thumb/d/d8/Pont_du_Gard_Oct_2007.jpg/300px-Pont_du_Gard_Oct_2007.jpg|aqueduct].|
|[* red] This very thin line confirms that this is a 32 nm HKMG (Hi-K metal gate) process.|
| [* black] The A6's 32 HKMG process is the same as the one utilized in the [guide|8293|Apple TV 3rd Generation|stepid=33185] (APL2498 on Chipworks).|
|[* black] In an [http://en.wikipedia.org/wiki/FET|FET (Field Effect Transistor)], K is a physical parameter of the device that depends on the doping levels of the silicon and the size of the transistor. The gate is the control pin on an FET.