Skip to main content

FH50Q LA J621P Rev 1.0 Schematic

100 pages · 4.28 MB · PDF

1

2

3

4

A

A

B

C

D

Compal Confidential

FH50Q MB Schematics Document

AMD Picasso Platform nVidia N17P-G1 & N18P-G0 LA-J621P REV:1.0

2019-11-26

Security Classification Security Classification Security ClassificationCompal Secret Data Compal Secret Data Compal Secret DataCompal Electronics, Inc. Compal Electronics, Inc. Compal Electronics, Inc.
Issued Date Issued Date Issued Date2019/07/24 2019/07/24 2019/07/24Deciphered Date Deciphered Date Deciphered Date2020/07/24 2020/07/24 2020/07/24Title Title Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSCOVER PAGE COVER PAGE COVER PAGE
R&D R&D R&DSize Document Number Size Document Number Size Document NumberRev 1.0 Rev 1.0 Rev 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Shared with Compal MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Shared with Compal MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Shared with CompalFH50Q M/B LA-J621P Custom FH50Q M/B LA-J621P Custom FH50Q M/B LA-J621P Custom
Date: Monday, November 25, 2019 Date: Monday, November 25, 2019 Date: Monday, November 25, 2019Sheet Sheet Sheetof 1 of 1 of 1100 100 100

Table Caption: This table is a header section from a technical document, likely an engineering drawing from Compal Electronics, Inc., containing information about security classification, confidentiality, issued and deciphered dates, document title, revision, and document number.

C

B

D

E

E

1

2

3

4

1

2

3

4

A

Compal Confidential

Model Name : FH50Q

GDDR5 x4

Port 0, 1, 2, 3

SSD1

page 68~70

NGFF Conn.

Fan Control

RTC CKT.

page 11

Power On/Off CKT.

page 63

DC/DC Interface CKT.

page 78

Power Circuit DC/DC

page 82~97

VRAM Config Table page 29

A

page 77

page 35~36

128-bits

Port 4

LAN

RTL8118ASA

page 51

Transformer

RJ45

page 51

Sub Board

LS-J621P IO/B

page 73

LS-H502 Hall Sensor/B

page 66

B

GPU

N18P-G0

or

N17P-G1

page 27~33

Port 1

eDP Conn.

page 38

Port 5

WLAN/BT

NGFF Conn.

page 52

B

PEG x8

Display

Port

Port 0

HDMI Conn.

page 40

PCIE

SPI

page 10

BIOS (8M, 1.8V)

C

AMD

Picasso

AMD FP5 APU

BGA 1140-balls page 6~12

LPC

ENE

KBC9022

page 58

page 63

Int.KBD

C

PS2

PTP

Memory BUS(DDR4)

1.2V DDRIV

2400Mhz

USB2.0

USB

USB

USB3.0

HD Audio

SATA III

I2C

Port 3

Security Classification

Security Classification

Security Classification

Issued Date

Port 3

Port 1

Port 0

HDD

Conn.

page 67

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Issued Date page 63

2019/07/24

2019/07/24

D

(Channel A)

page 23

260pin DDRIV SO-DIMM

Port 1

Port 2

Type-A (CHG)

Conn.

page 71

Type-A

Conn.

Port 2

Port 1

SSD2

page 68

NGFF Conn.

2020/07/24

2020/07/24

Issued Date

Deciphered Date

2019/07/24

2020/07/24

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

Port 3

Type-C

Conn.

page 42~43

page 72

E

(Channel B)

page 24

260pin DDRIV SO-DIMM

Port 4

Port 0

Port 5

Type-A

(SUB)

page 73

page 38

Int. DMIC

on Camera

Camera page 38

Audio

ALC255

page 56

Int. Speaker page 73

UAJ

Conn.

page 56

on Sub/B

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

BLOCK DIAGRAMS

BLOCK DIAGRAMS

BLOCK DIAGRAMS

Size

Size

Size

Document

Document

Document

Custom

Number

Number

Number

FH50Q M/B LA-J621P

FH50Q M/B LA-J621P

Custom

FH50Q M/B LA-J621P

Custom

Date:

Date:

Date:

Monday, November 25, 2019

Monday, November 25, 2019

Sheet

Sheet

Sheet

Monday, November 25, 2019

E

WLAN/BT

NGFF Conn.

page 52

2

2

2

of of

of

100

100

100

Rev

Rev

Rev

1.0

1.0

1.0

1

2

3

4

1

2

3

4

Voltage Rails

Power Plane

+19V_VIN

+19VB

+APU_CORE

+APU_CORE_SOC

+1.8VALW

+1.8VS

+2.5V

+1.2V

+0.6VS

+3VALW

+3VS

+5VALW

+5VS

+0.9VALW

+0.9VS

+RTC_APU

+3V_LAN

+TP_VCC

+FP_VCC

+3VSDGPU

+1.8VSDGPU_AON

+1.8VSDGPU_MAIN

+1.35VSDGPU

+1.0VSDGPU

+NVVDD1

A

Description

Adapter power supply (19V)

AC or

Join iFixit for free to read the full document (100 pages)

We require a free account to help block bots and preserve iFixit for humans.

View Statistics:

Past 24 Hours: 0

Past 7 Days: 0

Past 30 Days: 12

All Time: 87